My FPGA project has been sat on the shelf for a while. Change of job, life, chess, etc., all conspiring to get in the way. At least my chess has improved :)
But I hadn't forgotten about it. Whilst cowering in the shade on holiday I read a number of books, including Free Range VHDL from free range factory, which I recommend to any fellow beginners. It's a totally free, well written and easy to follow introduction into practical VHDL.
Suitably inspired, I decided to dust off my dev kit and get it working.
But I hadn't forgotten about it. Whilst cowering in the shade on holiday I read a number of books, including Free Range VHDL from free range factory, which I recommend to any fellow beginners. It's a totally free, well written and easy to follow introduction into practical VHDL.
Suitably inspired, I decided to dust off my dev kit and get it working.
When I left it, the UART was working as a stand-alone entity, but the UART+CPU construction was having some problems. These turned out to be a number of small issues, now resolved. So I am now able to move to the next stage - a bootloader that will suck in code via the serial port and then execute it.